
In a previous chapter, we have studied reductions and saw how they can be used to both expand the landscape of decidable languages and expand the landscape of undecidable languages. As such, the concept of a reduction is a very powerful tool.
In the context of computational complexity, reductions once again play a very important role. In particular, by tweaking our definition of a reduction a bit so that it is required to be efficiently computable, we can use reductions to expand the landscape of tractable (i.e. efficiently decidable) languages and to expand the landscape of intractable languages. Another cool feature of reductions is that it allows us to show that many seemingly unrelated problems are essentially the same problem in disguise, and this allows us to have a deeper understanding of the mysterious and fascinating world of computational complexity.
Our goal in this chapter is to introduce you to the concept of polynomial-time (efficient) reductions, and give you a few examples to make the concept more concrete and illustrate their power.
In some sense, this chapter marks the introduction to our discussion on the vs problem, even though the definition of will only be introduced in the next chapter, and the connection will be made more precise then.
In this section, we present the definitions of some of the decision problems that will be part of our discussion in this module.
In the -coloring problem, the input is an undirected graph , and the output is True if and only if the graph is -colorable (see Definition (-colorable graphs)). We denote this problem by . The corresponding language is
Let be an undirected graph. A subset of the vertices is called a clique if for all with , . We say that contains a -clique if there is a subset of the vertices of size that forms a clique.
In the clique problem, the input is an undirected graph and a number , and the output is True if and only if the graph contains a -clique. We denote this problem by . The corresponding language is
Let be an undirected graph. A subset of the vertices is called an independent set if there is no edge between any two vertices in the subset. We say that contains an independent set of size if there is a subset of the vertices of size that forms an independent set.
In the independent set problem, the input is an undirected graph and a number , and the output is True if and only if the graph contains an independent set of size . We denote this problem by . The corresponding language is
We denote by the unary NOT operation, by the binary AND operation, and by the binary OR operation. In particular, we can write the truth tables of these operations as follows:
Let be Boolean variables, i.e., variables that can be assigned True or False. A literal refers to a Boolean variable or its negation. A clause is an “OR” of literals. For example, is a clause. A Boolean formula in conjunctive normal form (CNF) is an “AND” of clauses. For example, is a CNF formula. We say that a Boolean formula is a satisfiable formula if there is a truth assignment (which can also be viewed as a assignment) to the Boolean variables that makes the formula evaluate to true (or ).
In the CNF satisfiability problem, the input is a CNF formula, and the output is True if and only if the formula is satisfiable. We denote this problem by . The corresponding language is In a variation of , we restrict the input formula such that every clause has exactly 3 literals (we call such a formula a 3CNF formula). For instance, the following is a 3CNF formula: For example, This variation of the problem is denoted by .
A Boolean circuit with -input variables () is a directed acyclic graph with the following properties. Each node of the graph is called a gate and each directed edge is called a wire. There are types of gates that we can choose to include in our circuit: AND gates, OR gates, NOT gates, input gates, and constant gates. There are 2 constant gates, one labeled and one labeled . These gates have in-degree/fan-in . There are input gates, one corresponding to each input variable. These gates also have in-degree/fan-in . An AND gate corresponds to the binary AND operation and an OR gate corresponds to the binary OR operation . These gates have in-degree/fan-in . A NOT gate corresponds to the unary NOT operation , and has in-degree/fan-in . One of the gates in the circuit is labeled as the output gate. Gates can have out-degree more than , except for the output gate, which has out-degree .
For each 0/1 assignment to the input variables, the Boolean circuit produces a one-bit output. The output of the circuit is the output of the gate that is labeled as the output gate. The output is calculated naturally using the truth tables of the operations corresponding to the gates. The input-output behavior of the circuit defines a function and in this case, we say that is computed by the circuit.
Below is an example of how we draw a circuit. In this example, .
The output gate is the gate at the very top with an arrow that links to nothing. The circuit outputs 1 if and only if and .
A satisfiable circuit is such that there is 0/1 assignment to the input gates that makes the circuit output 1. In the circuit satisfiability problem, the input is a Boolean circuit, and the output is True if and only if the circuit is satisfiable. We denote this problem by . The corresponding language is
The name of a decision problem above refers both to the decision problem and the corresponding language.
Recall that in all the decision problems above, the input is an arbitrary word in . If the input does not correspond to a valid encoding of an object expected as input (e.g. a graph in the case of COL), then those inputs are rejected (i.e., they are not in the corresponding language).
All the problems defined above are decidable and have exponential-time algorithms solving them.
Suppose . Observe that if , then . Equivalently, taking the contrapositive, if , then . So when , we think of as being at least as hard as with respect to polynomial-time decidability.
Note that if and , then .
Recall that in a previous chapter, we introduced the concept of a mapping reduction (see Note (Mapping reductions)) as a special kind of a regular (Turing) reduction. We observed that to specify a mapping reduction from to , one simply needs to define an algorithm computing a function such that if and only if . Below we define the notion of a polynomial-time mapping reduction.
Let and be two languages. Suppose that there is a polynomial-time computable function (also called a polynomial-time transformation) such that if and only if . Then we say that there is a polynomial-time mapping reduction (or a Karp reduction, named after Richard Karp) from to , and denote it by .
To show that there is a Karp reduction from to , you need to do the following things.
Present a computable function .
Show that .
Show that (it is usually easier to argue the contrapositive).
Show that can be computed in polynomial time.
In picture, the transformation looks as follows.
Note that need not be injective and it need not be surjective.
Recall that a mapping reduction is really a special kind of a Turing reduction. In particular, if there is a mapping reduction from language to language , then one can construct a regular (Turing) reduction from to . We explain this below as a reminder.
To establish a Turing reduction from to , we need to show how we can come up with a decider for given that we have a decider for . Now suppose we have a mapping reduction from to . This means we have a computable function as in the definition of a mapping reduction. This then allows us to build as follows. Given any input , first feed into , and then feed the output into . The output of is the output of . We illustrate this construction with the following picture.
Take a moment to verify that this reduction from to is indeed correct given the definition of .
Even though a mapping reduction can be viewed as a regular (Turing) reduction, not all reductions are mapping reductions.
Following the previous important note, we start by presenting a computable function .
(In a Karp reduction from to , when we define , it is standard to define it so that invalid instances of are mapped to invalid instances of . We omit saying this explicitly when presenting the reduction, but you should be aware that this is implicitly there in the definition of . In the above definition of , for example, any string that does not correspond to a valid instance of CLIQUE (i.e., not a valid encoding of a graph together with a positive integer ) is mapped to an invalid instance of IS (e.g. they can be mapped to , which we can assume to not be a valid instance of IS.))
To show that works as desired, we first make a definition. Given a graph , the complement of is the graph where . In other words, we construct by removing all the edges of and adding all the edges that were not present in .
We now argue that if and only if . First, assume . Then corresponds to a valid encoding of a graph and an integer. Furthermore, contains a clique of size . In the complement graph, this is an independent set ( for all distinct implies for all distinct ). Therefore . Conversely, if , then contains an independent set of size . This set is a clique in the complement of , which is . So the pre-image of under , which is , is in CLIQUE.
Finally, we argue that the function can be computed in polynomial time. This is easy to see since the construction of (and therefore ) can be done in polynomial time as there are polynomially many possible edges.
We can use exactly the same reduction as the one in the reduction from CLIQUE to IS:
This reduction establishes . The proof of correctness is the same as in the proof of Theorem (CLIQUE reduces to IS); just interchange the words “clique” and “independent set” in the proof.
Let be a graph. A Hamiltonian path in is a path that visits every vertex of the graph exactly once. The HAMPATH problem is the following: given a graph , output True if it contains a Hamiltonian path, and output False otherwise.
Let . Show that .
Let . Show that .
Part (1): We need to show that there is a poly-time computable function such that HAMPATH if and only if . Below we present .
We first prove the correctness of the reduction. If , then corresponds to an encoding of a graph that contains a Hamiltonian path. Let be the number of vertices in the graph. A Hamiltonian path visits every vertex of the graph exactly once, so has length (the length of a path is the number of edges along the path). Therefore, by the definition of , we must have . For the converse, suppose . Then it must be the case that , where , is some graph, and is the number of vertices in that graph. Furthermore, by the definition of , it must be the case that contains a path of length . A path cannot repeat any vertices, so this path must be a path visiting every vertex in the graph, that is, it must be a Hamiltonian path. So .
To see that the reduction is polynomial time, note that the number of vertices in the given graph can computed in polynomial time. So the function can be computed in polynomial time.
Part (2): We need to show that there is a poly-time computable function such that HAMPATH if and only if . Below we present .
A note: For the correctness proof below, we are going to ignore the edge case where the graph has 1 vertex. By convention, we don’t allow graphs with 0 vertices.
We now prove the correctness of the reduction. If , then corresponds to an encoding of a graph that contains a Hamiltonian path. A Hamiltonian path visits every vertex of the graph, so it forms a spanning tree with 2 leaves. Therefore, by the definition of , we must have . For the converse, suppose . Then it must be the case that , where and is some graph. Furthermore, by the definition of , must contain a spanning tree with 2 leaves (recall that every tree with at least 2 vertices must contain at least 2 leaves). A tree with exactly 2 leaves must be a path (prove this as an exercise). Since this path is a spanning tree, it must contain all the vertices. Therefore this path is a Hamiltonian path in . So .
It is clear that the function can be computed in polynomial time. This completes the proof.
The theorem below illustrates how reductions can establish an intimate relationship between seemingly unrelated problems.
It is completely normal (and expected) if the proof below seems magical and if you get the feeling that you could not come up with this reduction yourself. You do not have to worry about any of the details of the proof (it is completely optional). The point of this example is to illustrate to you that reductions can be complicated and unintuitive at first. It is meant to highlight that seemingly unrelated problems can be intimately connected via very interesting transformations.
To prove the theorem, we will present a Karp reduction from to . In particular, given a valid instance , we will construct a instance such that is a satisfiable Boolean circuit if and only if is -colorable. Furthermore, the construction will be done in polynomial time.
First, it is generally well-known that any Boolean circuit with AND, OR, and NOT gates can be converted into an equivalent circuit that only has NAND gates (in addition to the input gates and constant gates). A NAND gate computes the NOT of AND. The transformation can easily be done in polynomial time: for each AND, OR and NOT gate, you just create a little circuit with NAND gates that mimics the behavior of AND, OR and NOT. So without loss of generality, we assume that our circuit is a circuit with NAND gates, input gates and constant gates. We construct by converting each NAND gate into the following graph.
The vertices labeled with and correspond to the inputs of the NAND gate. The vertex labeled with corresponds to the output of the gate. We construct such a graph for each NAND gate of the circuit, however, we make sure that if, say, gate is an input to gate , then the vertex corresponding to the output of coincides with (is the same as) the vertex corresponding to one of the inputs of . Furthermore, the vertices labeled with , and are the same for each gate. In other words, in the whole graph, there is only one vertex labeled with , one vertex labeled with , and one vertex labeled with . Lastly, we put an edge between the vertex corresponding to the output vertex of the output gate and the vertex labeled with . This completes the construction of the graph . Before we prove that the reduction is correct, we make some preliminary observations.
Let’s call the colors we use to color the graph , and (we think of as “none”). Any valid coloring of must assign different colors to vertices that form a triangle (e.g. vertices labeled with , and ). If is -colorable, we can assume without loss generality that the vertex labeled is colored with the color , the vertex labeled is colored with color , and the vertex labeled is colored with the color . This is without loss of generality because if there is a valid coloring of , any permutation of the colors corresponds to a valid coloring as well. Therefore, we can permute the colors so that the labels of those vertices coincide with the colors they are colored with.
Notice that since the vertices corresponding to the inputs of a gate (i.e. the and vertices) are connected to vertex , they will be assigned the colors or . Let’s consider two cases:
If and are assigned the same color (i.e. either they are both or they are both ), the vertex labeled with will have to be colored with that same color. That is, the vertex labeled with must get the color corresponding to the evaluation of . To see this, just notice that the vertices labeled and must be colored with the two colors that and are not colored with. This forces the vertex to be colored with the same color as and .
If and are assigned different colors (i.e. one is colored with and the other with ), the vertex labeled with will have to be colored with . That is, as in the first case, the vertex labeled with must get the color corresponding to the evaluation of . To see this, just notice that one of the vertices labeled or must be colored with . This forces the vertex to be colored with since it is already connected to vertex .
In either case, the color of the vertex must correspond to the evaluation of . It is then easy to see that the color of the vertex must correspond to the evaluation of .
We are now ready to argue that circuit is satisfiable if and only if is -colorable. Let’s first assume that the circuit we have is satisfiable. We want to show that the graph we constructed is -colorable. Since the circuit is satisfiable, there is a 0/1 assignment to the input variables that makes the circuit evaluate to . We claim that we can use this 0/1 assignment to validly color the vertices of . We start by coloring each vertex that corresponds to an input variable: In the satisfying truth assignment, if an input variable is set to , we color the corresponding vertex with the color , and if an input variable is set to , we color the corresponding vertex with the color . As we have argued earlier, a vertex that corresponds to the output of a gate (the vertex at the very bottom of the picture above) is forced to be colored with the color that corresponds to the value that the gate outputs. It is easy to see that the other vertices, i.e., the ones labeled and the unlabeled vertices can be assigned valid colors. Once we color the vertices in this manner, the vertices corresponding to the inputs and output of a gate will be consistently colored with the values that it takes as input and the value it outputs. Recall that in the construction of , we connected the output vertex of the output gate with the vertex labeled with , which forces it to be assigned the color . We know this will indeed happen since the 0/1 assignment we started with makes the circuit output . This shows that we can obtain a valid -coloring of the graph .
The other direction is very similar. Assume that the constructed graph has a valid -coloring. As we have argued before, we can assume without loss of generality that the vertices labeled , , and are assigned the colors , , and respectively. We know that the vertices corresponding to the inputs of a gate must be assigned the colors or (since they are connected to the vertex labeled ). Again, as argued before, given the colors of the input vertices of a gate, the output vertex of the gate is forced to be colored with the value that the gate would output in the circuit. The fact that we can -color the graph means that the output vertex of the output gate is colored with (since it is connected to vertex and vertex by construction). This implies that the colors of the vertices corresponding to the input variables form a 0/1 assignment that makes the circuit output a , i.e. the circuit is satisfiable.
To finish the proof, we must argue that the construction of graph , given circuit , can be done in polynomial time. This is easy to see since for each gate of the circuit, we create at most a constant number of vertices and a constant number of edges. So if the circuit has gates, the construction can be done in steps.
Suppose and . Let be the map that establishes and let be the map that establishes . So if and only if . And if and only if . Both and are computable in polynomial time.
To show , we define such that . That is, for all , . We need to show that
if and only if ;
is computable in polynomial time.
For the first part, note that by the properties of and , if and only if if and only if (i.e., ).
(If you are having trouble following this, you can break this part up into two parts:
(i) , (ii) .)
For the second part, if is computable in time , , and is computable in time , , then can be computed in time . (Why?)
Let be a set of languages containing .
We say that is -hard (with respect to Cook reductions) if for all languages , .
(With respect to polynomial time decidability, a -hard language is at least as “hard” as any language in .)We say that is -complete if is -hard and .
(A -complete language represents the “hardest” language in with respect to polynomial time decidability.)
Suppose is -complete. Then observe that .
Above we have defined -hardness using Cook reductions. In literature, however, they are often defined using Karp reductions, which actually leads to a different notion of -hardness. There are good reasons to use this restricted form of reductions. More advanced courses may explore some of these reasons.
What is a Cook reduction? What is a Karp reduction? What is the difference between the two?
Explain why every Karp reduction can be viewed as a Cook reduction.
Explain why every Cook reduction cannot be viewed as a Karp reduction.
True or false: .
True or false: For languages and , if and only if .
Define the complexity class .
True or false: The language is in .
True or false: Let be two languages. Suppose there is a polynomial-time computable function such that iff . Then Cook-reduces to .
True or false: There is a Cook reduction from 3SAT to HALTS.
For a complexity class containing , define what it means to be -hard.
For a complexity class containing , define what it means to be -complete.
Suppose is -complete. Then argue why .
There are two very important notions of reductions introduced in this chapter: Cook reductions and Karp reductions. Make sure you understand the similarities and differences between them. And make sure you are comfortable presenting and proving the correctness of reductions. This is the main goal of the chapter.
The chapter concludes with a couple of important definitions: -hardness, -completeness. We present these definitions in this chapter as they are closely related to reductions. However, we will make use of these definitions in the next chapter after we introduce the complexity class . For now, make sure you understand the definitions and also Note (-completeness and ).